Microelectronics and Nanotechnology Research Group
University of Manitoba - Department of Electrical and Computer Engineering
First high-k gate insulator, poly-silicon gate, sub 0.1 μm (80 nm gate length) FET
In 1999 - 2000, I was the group leader and responsible for the development of the first high-k gate insulator, poly-silicon gate, sub 0.1 μm (80 nm gate length) FETs using standard CMOS processing. These short-channel devices showed promising electrical and physical characteristics (see IEDM 2000) for polycrystalline silicon-gate FETs, integrated using Al2O3 gate dielectrics; 100x reduction in leakage currents and equal or better reliability than SiO2. This work paved the way for the integration of other high-k materials such as HfO2 and ZrO2 to be implemented.