Microelectronics and Nanotechnology Research Group
University of Manitoba - Department of Electrical and Computer Engineering
Dr. Douglas A. Buchanan, Ph.D., P.Eng., FCAE
Professor, Electrical and Computer Engineering, University of Manitoba.
Education
✦ Ph.D. in Applied Physics and Electronics, University of Durham, Durham, England, 1986.
✦ M.Sc. in Electrical Engineering, University of Manitoba, Winnipeg, Canada, 1982.
✦ B.Sc. in Electrical Engineering, University of Manitoba, Winnipeg, Canada, 1981.
Previous Positions
✦ Vice-president, Commercialization, Innovate Manitoba, 2012 – 2014.
✦ Acting Dean, Faculty of Engineering, University of Manitoba, 2010 – 2011.
✦ Associate Dean - Research, Faculty of Engineering, University of Manitoba, 2009 – 2010.
✦ Canada Research Chair Tier II - Microelectronic Materials, 2003 – 2013.
✦ Associate Professor, Department of Electrical and Computer Engineering, University of Manitoba, Canada, 2002 – 2003.
✦ Research Staff Member, IBM - Thomas J. Watson Research Center, NY, USA, 1991 – 2002.
✦ Staff /Advisory Engineer, IBM – Microelectronics Division, NY, USA, 1988 – 1991.
✦ Post-doctoral Fellow, IBM - Thomas J. Watson Research Center, NY, USA, 1986 – 1988.
✦ Lecturer (Asst. Professor), Dept. of Applied Physics and Electronics, University of Durham, Durham England, 1983 – 1986.
✦ Research Assistant, Dept. of Applied Physics and Electronics, University of Durham, Durham England, 1982 – 1983.
Most Significant Contributions to Research and/or to Practical Applications
✦ Defect Analysis for Advanced CMOS High-κ Gate Dielectric Stacks.
✦ First high-k gate insulator, poly-silicon gate, sub 0.1 μm (80 nm gate length) FET.
✦ Quantum-mechanical tunnelling in ultra-thin gate dielectrics.
✦ Silicon dioxide degradation due to hydrogen and “hot” electrons.
✦ Tungsten (mid-gap) metal gates for ultra-thin dielectrics.
Awards
✦ Students Teacher Recognition Award, “For Significant Contributions to Excellence in Teaching”, University of Manitoba, 2007.
✦ IBM-Research Division Award, “For contributions to the development of a low-temperature plasma-enhanced-vapor-deposition process for fabricating silicon-dioxide films”, 1988.
✦ Outstanding Technical Achievement Award, “For studies of the release and subsequent motion of hydrogen in electrically stressed silicon dioxide films”, 1992.
✦ General Manager's Teamwork Award (Microelectronics Division), “For research and development on Dielectric Reliability and its application to future CMOS processes”, 1997.
Professional Memberships
✦ Senior Member of the IEEE.
✦ Member of the American Institute of Physics.
Editorial Duties
✦ Editor of the IBM Journal of Research and Development (Vol. 43, No. 3, 1999) special issue on Ultra-thin dielectric films.
✦ Editor of the symposium proceedings of Structure and Electronic Properties of Ultra thin Dielectric Films on Silicon and Related Structures, MRS Meeting, Boston Massachusetts, November, (1999).
Conference/Meeting Organization
✦ Co-Chairman for Materials Research Society (MRS) symposium on Structure and Electronic Properties of Ultra thin Dielectric Films on Silicon and Related Structures, Boston Massachusetts, 1999.
✦ Technical committee member (1991-95), Arrangements Chairman (1995), Technical Chairman (1996) and General Chairman (1997) of the IEEE Semiconductor Interface Specialists Conference, held annually in December.
✦ Co-chairman for the Semiconductor Research Corporation, Topical Research Conference (TRC) on Ultra-thin Dielectrics at Durham, NC, USA, 1996.
Reviewer for Journals
Journal of Applied Physics
Applied Physics Letters
American Institute of Physics - Physical Review B
Physical Review Letters
IEEE – Transactions on Electron Devices
Electron Device Letters
IEEE Proceedings
Others: Thin Solid Films, Solid State Electronics, J. Electrochemical Society, Journal of Vacuum Science and
Technology, IEE Electronics Letters
Setting Roadmaps and Guidelines
Founding member of SEMATECH’s (SEmiconductor MAnufacturing TECHnology, a consortium, of microelectronics companies, formed in 1987, for solving common manufacturing problems) Gate Stack Engineering Working Group from 1992-2000 who’s responsibility was, and still is, for setting guidelines for “gate-stack engineering” via the International Technology Roadmap for Semiconductors (ITRS) for future microelectronics manufacturing.