Quantum-mechanical tunnelling in ultra-thin gate dielectrics

A one dimensional (1-D) quantum-mechanical tunnelling simulator, based on 1st principles calculation was undertaken evaluate the quantum-mechanical, direct tunnelling current in extremely thin gate dielectrics; ≤ 30Ǻ. This work was published in a number of peer-reviewed journals and [5-6, 8] and been presented at conferences both as invited and contributed papers. From this work a small (windows-based) calculator (TQM 6.1) was written to extract dielectric thickness’ which included QM effects, from capacitance-voltage data. This simulator is still used by research scientists and development engineers from companies (IBM, AMD, HP, Ti etc.) as well as many universities (e.g. NCSU, UT Austin, Berkeley, Rutgers etc.) and government labs (NIST, Navel Research Labs) as a benchmark against which there own data can is compared.


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